116 Slices
Medium 9781601323262

A Novel Information Sharing Architecture Constructed by Broadcast Based Information Sharing System (BBISS)

Hamid R. Arabnia, Lou D'Alotto, Hiroshi Ishii, Minoru Ito, Kazuki Joe, Hiroaki Nishikawa, Georgios Sirakoulis, William Spataro, Giuseppe A. Trunfio, George A. Gravvanis, George Jandieri, Ashu M. G. Solo, Fernando G. Tinetti CSREA Press PDF

534

Int'l Conf. Par. and Dist. Proc. Tech. and Appl. | PDPTA'14 |

A Novel Information Sharing Architecture Constructed by Broadcast Based Information Sharing System (BBISS)

Keisuke Utsu1, Chee Onn Chow2, Hiroaki Nishikawa3, and Hiroshi Ishii1

1

School of Information and Telecommunication Engineering, Tokai University, Minato, Tokyo, Japan

2

Faculty of Engineering, University of Malaya, Kuala Lumpur, Malaysia

3

Graduate School of Systems and Information Engineering, University of Tsukuba, Tsukuba, Ibaraki, Japan

Abstract - Existing communication infrastructure may be unavailable in disaster situations. Under the situations, it is difficult to share information composed of multiple packets, such as text, image, and audio data in the communication infrastructure unavailable areas. To enable information sharing without using existing communication infrastructure in the areas, we have proposed a novel system “BroadcastBased Information Sharing System (BBISS)”. The paper evaluates the performance of BBISS by the network simulations. The simulation results can conclude that the proposed method achieves the high information reachability without significantly increasing of the number of packet exchanges.

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Medium 9781601323262

Study of Dynamically-Allocated Multi-Queue Buffers for NoC Routers

Hamid R. Arabnia, Lou D'Alotto, Hiroshi Ishii, Minoru Ito, Kazuki Joe, Hiroaki Nishikawa, Georgios Sirakoulis, William Spataro, Giuseppe A. Trunfio, George A. Gravvanis, George Jandieri, Ashu M. G. Solo, Fernando G. Tinetti CSREA Press PDF

Int'l Conf. Par. and Dist. Proc. Tech. and Appl. | PDPTA'14 |

135

Study of Dynamically-Allocated Multi-Queue Buffers for NoC Routers

Yung-Chou Tsai

Yarsun Hsu

Department of Electrical Engineering

National Tsing Hua University

Hsinchu, Taiwan d923935@oz.nthu.edu.tw

Department of Electrical Engineering

National Tsing Hua University

Hsinchu, Taiwan yshsu@ee.nthu.edu.tw

Abstract—A large portion of area and power in Network-onChip (NoC) routers is consumed by buffers, and hence these costly storage resources must be utilized well. However, some early related literatures are not suitable for modern NoC router architecture as well as various complicated traffic loads anymore. In this work, we refine the dynamically-allocated multi-queue (DAMQ) buffer organization and propose a new one that can accommodate multiple packets more than the number of virtual channels, named DAMQ with multiple packets (DAMQ-MP). The DAMQ-MP scheme can solve certain data transmission issues under some circumstances, such as heavy network congestion or short packets, to improve performance. We also introduced two methods applicable to

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Medium 9781601323262

Embarrassingly Parallel Butterflies Solve Diagonally Dominant Tridiagonal Toeplitz Systems

Hamid R. Arabnia, Lou D'Alotto, Hiroshi Ishii, Minoru Ito, Kazuki Joe, Hiroaki Nishikawa, Georgios Sirakoulis, William Spataro, Giuseppe A. Trunfio, George A. Gravvanis, George Jandieri, Ashu M. G. Solo, Fernando G. Tinetti CSREA Press PDF

430

Int'l Conf. Par. and Dist. Proc. Tech. and Appl. | PDPTA'14 |

Embarrassingly Parallel Butterflies Solve Diagonally Dominant

Tridiagonal Toeplitz Systems

Brian J. Murphy

Department of Mathematics and Computer Science

Lehman College of the City University of New York, Bronx, NY 10468 USA brian.murphy@lehman.cuny.edu

Abstract— We present a parallel tridiagonal Toeplitz solver for diagonally dominant systems. Our solver utilizes a two tiered data decomposition. The first is a course grained and communication free matrix block partitioning. The second is

fine-grained and depends on a fast Fourier transform (FFT) kernel. Our algorithm is designed to benefit from the use of parallel FFT processors. Such devices vastly outperform the general architectures on which other tridiagonal solvers are most likely to be implemented in terms of both speed of execution and conservation of energy. Furthermore, ramping up processor counts to limit or even eliminate agglomeration is embarrassingly parallel.

Keywords: Tridiagonal Toeplitz, Diagonally Dominant, Linear

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Medium 9781601323262

A Novel Quorum Protocol for Improved Performance

Hamid R. Arabnia, Lou D'Alotto, Hiroshi Ishii, Minoru Ito, Kazuki Joe, Hiroaki Nishikawa, Georgios Sirakoulis, William Spataro, Giuseppe A. Trunfio, George A. Gravvanis, George Jandieri, Ashu M. G. Solo, Fernando G. Tinetti CSREA Press PDF

84

Int'l Conf. Par. and Dist. Proc. Tech. and Appl. | PDPTA'14 |

A Novel Quorum Protocol for Improved Performance

A. Parul Pandey1 , B. M Tripathi2

2 Computer Science, Institution of Engineering and Technology , Lucknow, U.P., India

Abstract— In this paper, we present an efficient quorum protocol for reading data with minimum read quorum size. This protocol for managing replicated data is named as Wheel Quorum Protocol. We impose a logical wheel structure on the set of copies of an object. The protocol ensures minimum read quorum size of one, by reading one copy of an object while maintaining acceptable size of write operations. In this paper, we also analyze several quorum types in terms of quorum size and message overhead. Our protocol proves to incur minimum communication overhead. Wheel structure has a wider application area as it can be imposed in a network with any number of nodes. This protocol is especially beneficial for read intensive applications.

Keywords: Replica-control, distributed database, quorum consensus.

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Medium 9781601323262

Enhanced Automated Data Dependency Analysis for Functionally Correct Parallel Code

Hamid R. Arabnia, Lou D'Alotto, Hiroshi Ishii, Minoru Ito, Kazuki Joe, Hiroaki Nishikawa, Georgios Sirakoulis, William Spataro, Giuseppe A. Trunfio, George A. Gravvanis, George Jandieri, Ashu M. G. Solo, Fernando G. Tinetti CSREA Press PDF

312

Int'l Conf. Par. and Dist. Proc. Tech. and Appl. | PDPTA'14 |

Enhanced Automated Data Dependency Analysis for Functionally

Correct Parallel Code

Prasad Pawar1 , Pramit Mehta1 , Naveen Boggarapu1 , and Léo Grange1

1 Center for Research of Engineering Sciences and Technology (CREST), KPIT Technologies Ltd., Pune, India

Abstract— There is a growing interest in the migration of legacy sequential applications to multicore hardware while ensuring functional correctness powered by automatic parallelization tools. OpenMP eases the loop parallelization process, but the functional correctness of parallelized code is not ensured. We present a methodology to automatically analyze and prepare OpenMP constructs for automatic parallelization, guaranteeing functional correctness while benefiting from multicore hardware capabilities. We also present a framework for procedural analysis, and emphasize the implementation aspects of this methodology. Additionally, we cover some of the imperative enhancements to existing dependency analysis tests, like handling of unknown loop bounds. This method was used to parallelize an Advance Driver Assistance System (ADAS) module for Lane

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