105 Slices
Medium 9781601322586

A Fast Implementation of Parallel Discrete-Event Simulation on GPGPU

Hamid R. Arabnia, Hiroshi Ishii, Minoru Ito, Hiroaki Nishikawa, Fernando G. Tinetti, George A. Gravvanis, George Jandieri, and Ashu M. G. Solo CSREA Press PDF

516

Int'l Conf. Par. and Dist. Proc. Tech. and Appl. | PDPTA'13 |

A Fast Implementation of Parallel Discrete-Event Simulation on GPGPU

Janche Sang1, Che-Rung Lee2, Vernon Rego3 , and Chung-Ta King2 of Computer and Info. Science, Cleveland State University, OH 44115, USA

2 Dept. of Computer Science, National Tsing Hua University, HsinChu, Taiwan, ROC

3 Dept. of Computer Science, Purdue University, West Lafayette, IN 47907, USA

1 Dept.

Abstract— Modern General Purpose Graphics Processing

Units(GPGPUs) offer much more computational power than recent CPUs by providing a vast number of simple, data parallel, multithreaded cores. In this study, we focus on the use of a GPGPU to perform parallel discrete-event simulation. Our approach is to use a modified service time distribution function to allow more independent events to be processed in parallel. The implementation issues and alternative strategies will be discussed in detail. We use Thrust, an open-source parallel algorithms library which resembles the C++ Standard Template Library (STL), to build our tool.

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Medium 9781601322586

Real-Time Radio Wave Propagation for Mobile Ad-Hoc Network Emulation Using GPGPUs

Hamid R. Arabnia, Hiroshi Ishii, Minoru Ito, Hiroaki Nishikawa, Fernando G. Tinetti, George A. Gravvanis, George Jandieri, and Ashu M. G. Solo CSREA Press PDF

Int'l Conf. Par. and Dist. Proc. Tech. and Appl. | PDPTA'13 |

375

Real-Time Radio Wave Propagation for Mobile

Ad-Hoc Network Emulation Using GPGPUs

Brian J. Henz∗, David Richie† , Evens Jean‡,Song Jun Park∗, James A. Ross§, Dale R. Shires∗

∗ U.S.

Army Research Laboratory, APG, MD 21005

Deer Technology, Forest Hill, MD 21050

‡ Secure Mission Solutions, APG, MD 21005

§ Dynamics Research Corporation, Reston, VA 20190

† Brown

Abstract—The accurate simulation and emulation of mobile radios requires the computation of RF propagation path loss in order to accurately predict connectivity and signal interference.

There are many algorithms available for computing the RF propagation path loss between wireless devices including the LongleyRice model, the transmission line matrix (TLM), ray-tracing, and the parabolic equation method. Each of these methods has advantages and disadvantages but all require a large number of floating point operations during execution. In this paper we investigate using general purpose graphics processing units

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Medium 9781601322586

Low-Powered Self-Timed Pipeline with Variable-Grain Power Gating and Suspend-Free Voltage Scaling

Hamid R. Arabnia, Hiroshi Ishii, Minoru Ito, Hiroaki Nishikawa, Fernando G. Tinetti, George A. Gravvanis, George Jandieri, and Ashu M. G. Solo CSREA Press PDF

618

Int'l Conf. Par. and Dist. Proc. Tech. and Appl. | PDPTA'13 |

Low-Powered Self-Timed Pipeline with Variable-Grain Power

Gating and Suspend-Free Voltage Scaling

Kei MIYAGI1 , Shuji SANNOMIYA2 , Makoto IWATA1 , and Hiroaki NISHIKAWA2

1 School of Information, Kochi University of Technology, Kami, Kochi, Japan

2 Department of Computer Science, Graduate School of Systems and Information Engineering,

University of Tsukuba, Tsukuba Science City, Ibaraki, Japan

Abstract— This paper describes a variable-grain power gating and suspend-free voltage scaling scheme based on the self-timed pipeline (STP) circuits. The STP operates with its local hand-shake signal so that it does not require the global clock distribution, i.e., centralized control. Therefore, various power supply control for the STP can be naturally localized in both spatial and temporal domains without stopping its effective data transfer, e.g., program execution in case of microprocessors. As a result, the power supply scheme proposed in this paper can efficiently incorporate both commonly used voltage scaling (VS) and power gating

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Medium 9781601322586

A Point-Based Incentive Scheme for P2P Reputation Management Systems

Hamid R. Arabnia, Hiroshi Ishii, Minoru Ito, Hiroaki Nishikawa, Fernando G. Tinetti, George A. Gravvanis, George Jandieri, and Ashu M. G. Solo CSREA Press PDF

410

Int'l Conf. Par. and Dist. Proc. Tech. and Appl. | PDPTA'13 |

A Point-Based Incentive Scheme for

P2P Reputation Management Systems

Takuya NISHIKAWA1 and Satoshi FUJITA1

1 Department of Information Engineering, Hiroshima University

Higashi-Hiroshima, 739-8527, Japan

Abstract— This paper proposes an incentive scheme for

P2P resource management systems which encourages the users to evaluate the “trustworthiness of evaluations” given by the other users. More concretely, in the proposed scheme, each user earns a reward from other users by evaluating their evaluations, and a user which acquires a large number of evaluations will be granted a right to access high quality services. To this end, we introduce the notion of evaluation points which mediates the “evaluation of services” and the “evaluation of evaluations.” The performance of the proposed incentive scheme is evaluated by simulation. The simulation results indicate that: 1) the proposed scheme certainly encourages the users to conduct an evaluation of evaluations, 2) it encourages users to provide high quality evaluations of the services, and 3) a rational strategy for the users is to repeat evaluation of evaluations after conducting a certain number of evaluations of services.

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Medium 9781601322586

History-Aware Adaptive Routing Algorithm For Energy Saving in Interconnection Networks

Hamid R. Arabnia, Hiroshi Ishii, Minoru Ito, Hiroaki Nishikawa, Fernando G. Tinetti, George A. Gravvanis, George Jandieri, and Ashu M. G. Solo CSREA Press PDF

Int'l Conf. Par. and Dist. Proc. Tech. and Appl. | PDPTA'13 |

463

History-Aware Adaptive Routing Algorithm For Energy Saving in

Interconnection Networks

Hai Nguyen, Gonzalo Zarza, Daniel Franco and Emilio Luque

Computer Architecture & Operating Systems Department

Universitat Autònoma de Barcelona,08193 Bellaterra, Spain hai.nguyen@caos.uab.es, gonzalo.zarza@uab.es, daniel.franco@uab.es, emilio.luque@uab.es

Abstract— The increase of link speeds in the interconnection networks is evident both inside and outside of a datacenter. Thus it contributes an increasing portion of the power budget of the interconnection system. Link power management has been receiving more attention and many mechanisms were proposed. The emerging bit-serial link technology allows the links to work with different numbers of lanes & speeds. When the traffic load is slight, links are put in low-speed mode and consume less energy. However, links working in the low speed mode result in the increase in serialization latency. We propose a routing algorithm that takes into account the history usage of the links to focus network traffic in a small subset of high-speed links. It keeps high-speed links busier and leaves low-speed links with more idle time. Thus the mechanism saves energy and reduces the incurred serialization latency.

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